Macronix International has been doing research on new ways of stacking NAND flach memory in more efficient manners than currently possible, by using a 3D structure instead of the current practice of just stacking flash chips on top of each other (2D stacking).
Their most recent findings have been presented in two technical papers at the VLSI symposium in Honolulu earlier this week. Their current research focuses on a VG (Vertical Gate) architecture, which they believe to be the most promising way to achieve 3D arrays of flash memory. Or, as they say it:
In this paper, Macronix reports the fabrication and demonstration of an 8-layer, 75nm half-pitch, 3D VG (Vertical Gate) NAND Flash using a junction-free BE-SONOS device. The BE-SONOS charge-trapping device provides both high reliability and simple structure suitable for 3D. At an equivalent 0.0014 (um) 2 cell size (near world record), Macronix’s 3D VG NAND has shown no Z-directional interference, large read current, and large program window (7V) for MLC (Multi-level Cell) operation.
While this research won’t lead to larger flash drives in your home computer anytime soon, it does provide a growth path beyond simple bringing down chip sizes by moving to ever-smaller components.
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